2014-11-25 19:44:37 +08:00
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// Protocol Buffers - Google's data interchange format
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// Copyright 2012 Google Inc. All rights reserved.
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// http://code.google.com/p/protobuf/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above
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// copyright notice, this list of conditions and the following disclaimer
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// in the documentation and/or other materials provided with the
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// distribution.
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// * Neither the name of Google Inc. nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// This file is an internal atomic implementation, use atomicops.h instead.
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#ifndef GOOGLE_PROTOBUF_ATOMICOPS_INTERNALS_MIPS_GCC_H_
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#define GOOGLE_PROTOBUF_ATOMICOPS_INTERNALS_MIPS_GCC_H_
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#define ATOMICOPS_COMPILER_BARRIER() __asm__ __volatile__("" : : : "memory")
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namespace google {
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namespace protobuf {
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namespace internal {
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// Atomically execute:
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// result = *ptr;
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// if (*ptr == old_value)
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// *ptr = new_value;
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// return result;
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//
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// I.e., replace "*ptr" with "new_value" if "*ptr" used to be "old_value".
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// Always return the old value of "*ptr"
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//
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// This routine implies no memory barriers.
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inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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Atomic32 prev, tmp;
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__asm__ __volatile__(".set push\n"
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".set noreorder\n"
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"1:\n"
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"ll %0, %5\n" // prev = *ptr
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"bne %0, %3, 2f\n" // if (prev != old_value) goto 2
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"move %2, %4\n" // tmp = new_value
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"sc %2, %1\n" // *ptr = tmp (with atomic check)
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"beqz %2, 1b\n" // start again on atomic error
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"nop\n" // delay slot nop
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"2:\n"
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".set pop\n"
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: "=&r" (prev), "=m" (*ptr), "=&r" (tmp)
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: "Ir" (old_value), "r" (new_value), "m" (*ptr)
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: "memory");
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return prev;
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}
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// Atomically store new_value into *ptr, returning the previous value held in
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// *ptr. This routine implies no memory barriers.
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inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
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Atomic32 new_value) {
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Atomic32 temp, old;
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__asm__ __volatile__(".set push\n"
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".set noreorder\n"
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"1:\n"
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"ll %1, %4\n" // old = *ptr
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"move %0, %3\n" // temp = new_value
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"sc %0, %2\n" // *ptr = temp (with atomic check)
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"beqz %0, 1b\n" // start again on atomic error
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"nop\n" // delay slot nop
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".set pop\n"
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: "=&r" (temp), "=&r" (old), "=m" (*ptr)
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: "r" (new_value), "m" (*ptr)
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: "memory");
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return old;
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}
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// Atomically increment *ptr by "increment". Returns the new value of
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// *ptr with the increment applied. This routine implies no memory barriers.
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inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
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Atomic32 increment) {
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Atomic32 temp, temp2;
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__asm__ __volatile__(".set push\n"
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".set noreorder\n"
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"1:\n"
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"ll %0, %4\n" // temp = *ptr
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"addu %1, %0, %3\n" // temp2 = temp + increment
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"sc %1, %2\n" // *ptr = temp2 (with atomic check)
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"beqz %1, 1b\n" // start again on atomic error
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"addu %1, %0, %3\n" // temp2 = temp + increment
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".set pop\n"
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: "=&r" (temp), "=&r" (temp2), "=m" (*ptr)
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: "Ir" (increment), "m" (*ptr)
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: "memory");
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// temp2 now holds the final value.
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return temp2;
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}
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inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
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Atomic32 increment) {
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ATOMICOPS_COMPILER_BARRIER();
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Atomic32 res = NoBarrier_AtomicIncrement(ptr, increment);
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ATOMICOPS_COMPILER_BARRIER();
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return res;
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}
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// "Acquire" operations
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// ensure that no later memory access can be reordered ahead of the operation.
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// "Release" operations ensure that no previous memory access can be reordered
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// after the operation. "Barrier" operations have both "Acquire" and "Release"
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// semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory
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// access.
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inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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ATOMICOPS_COMPILER_BARRIER();
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Atomic32 res = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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ATOMICOPS_COMPILER_BARRIER();
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return res;
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}
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inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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ATOMICOPS_COMPILER_BARRIER();
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Atomic32 res = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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ATOMICOPS_COMPILER_BARRIER();
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return res;
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}
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inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
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*ptr = value;
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}
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inline void MemoryBarrier() {
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__asm__ __volatile__("sync" : : : "memory");
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}
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inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
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*ptr = value;
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MemoryBarrier();
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}
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inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
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MemoryBarrier();
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*ptr = value;
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}
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inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
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return *ptr;
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}
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inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
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Atomic32 value = *ptr;
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MemoryBarrier();
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return value;
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}
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inline Atomic32 Release_Load(volatile const Atomic32* ptr) {
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MemoryBarrier();
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return *ptr;
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}
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#if defined(__LP64__)
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// 64-bit versions of the atomic ops.
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inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 new_value) {
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Atomic64 prev, tmp;
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__asm__ __volatile__(".set push\n"
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".set noreorder\n"
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"1:\n"
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"lld %0, %5\n" // prev = *ptr
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"bne %0, %3, 2f\n" // if (prev != old_value) goto 2
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"move %2, %4\n" // tmp = new_value
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"scd %2, %1\n" // *ptr = tmp (with atomic check)
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"beqz %2, 1b\n" // start again on atomic error
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"nop\n" // delay slot nop
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"2:\n"
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".set pop\n"
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: "=&r" (prev), "=m" (*ptr), "=&r" (tmp)
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: "Ir" (old_value), "r" (new_value), "m" (*ptr)
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: "memory");
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return prev;
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}
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// Atomically store new_value into *ptr, returning the previous value held in
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// *ptr. This routine implies no memory barriers.
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inline Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr,
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Atomic64 new_value) {
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Atomic64 temp, old;
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__asm__ __volatile__(".set push\n"
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".set noreorder\n"
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"1:\n"
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"lld %1, %4\n" // old = *ptr
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"move %0, %3\n" // temp = new_value
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"scd %0, %2\n" // *ptr = temp (with atomic check)
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"beqz %0, 1b\n" // start again on atomic error
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"nop\n" // delay slot nop
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".set pop\n"
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: "=&r" (temp), "=&r" (old), "=m" (*ptr)
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: "r" (new_value), "m" (*ptr)
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: "memory");
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return old;
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}
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// Atomically increment *ptr by "increment". Returns the new value of
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// *ptr with the increment applied. This routine implies no memory barriers.
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inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr,
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Atomic64 increment) {
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Atomic64 temp, temp2;
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__asm__ __volatile__(".set push\n"
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".set noreorder\n"
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"1:\n"
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"lld %0, %4\n" // temp = *ptr
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"daddu %1, %0, %3\n" // temp2 = temp + increment
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"scd %1, %2\n" // *ptr = temp2 (with atomic check)
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"beqz %1, 1b\n" // start again on atomic error
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"daddu %1, %0, %3\n" // temp2 = temp + increment
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".set pop\n"
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: "=&r" (temp), "=&r" (temp2), "=m" (*ptr)
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: "Ir" (increment), "m" (*ptr)
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: "memory");
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// temp2 now holds the final value.
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return temp2;
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}
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inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr,
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Atomic64 increment) {
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MemoryBarrier();
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Atomic64 res = NoBarrier_AtomicIncrement(ptr, increment);
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MemoryBarrier();
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return res;
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}
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// "Acquire" operations
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// ensure that no later memory access can be reordered ahead of the operation.
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// "Release" operations ensure that no previous memory access can be reordered
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// after the operation. "Barrier" operations have both "Acquire" and "Release"
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// semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory
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// access.
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inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 new_value) {
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Atomic64 res = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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MemoryBarrier();
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return res;
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}
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inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 new_value) {
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MemoryBarrier();
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return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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}
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inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) {
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*ptr = value;
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}
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inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) {
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*ptr = value;
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MemoryBarrier();
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}
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inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
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MemoryBarrier();
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*ptr = value;
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}
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inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
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return *ptr;
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}
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inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
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Atomic64 value = *ptr;
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MemoryBarrier();
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return value;
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}
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inline Atomic64 Release_Load(volatile const Atomic64* ptr) {
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MemoryBarrier();
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return *ptr;
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}
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#endif
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} // namespace internal
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} // namespace protobuf
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} // namespace google
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#undef ATOMICOPS_COMPILER_BARRIER
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#endif // GOOGLE_PROTOBUF_ATOMICOPS_INTERNALS_MIPS_GCC_H_
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